Field of the Invention
Embodiments of the present invention relate generally to graphics processing and, more particularly, to techniques for maintaining atomicity and ordering for pixel shader operations.
Description of the Related Art
A conventional graphics pipeline typically includes a programmable pixel shader configured to execute various pixel shader programs on graphics primitives to generate color data for pixels. These operations generally do not maintain application programming interface (API) order, because doing so is typically unnecessary for pixel shading operations. Conversely, when performing pixel blending operations, API order should be maintained to reflect the order with which geometry appears within the scene being rendered. Thus, pixel blending operations are not performed by the pixel shader. Instead, pixel blending operations are typically performed in the raster operations processor (ROP). These units are usually configured to perform basic blending operations and to maintain API order when performing those blending operations.
Conventional ROPs are fixed-function hardware units that operate with speed, but with limited functionality. Generally, ROPs cannot be programmed the same way a pixel shader can be programmed. Consequently, the types of basic blending operations available via the ROP are inherently limited to those operations the ROP can be pre-programmed to perform.
In sum, conventional pixel shaders are capable of performing programmable shading operations, but lack the capacity to maintain API order for graphics primitives being processed. Conversely, conventional ROPs are capable of maintaining API order for graphics primitives, although cannot perform programmable operations.
As the foregoing illustrates, what is needed are techniques for performing programmable blending operations in a graphics processing pipeline while maintaining API ordering.